Debug Comparator A Low Register (Dbg_Cal) - NXP Semiconductors MC9S08SU16 Reference Manual

Field
CA[15:8] Comparator A High Compare Bits
The Comparator A High compare bits control whether Comparator A will compare the address bus bits
[15:8] to a logic 1 or logic 0.
0 Compare corresponding address bit to a logic 0.
1 Compare corresponding address bit to a logic 1.

28.3.2 Debug Comparator A Low Register (DBG_CAL)

All the bits in this register reset to 1 in POR or non-end-run
reset. The bits are undefined in end-run reset. In the case of an
end-trace to reset where DBGEN = 1 and BEGIN = 0, the bits
in this register do not change after reset.
Address: 18C0h base + 1h offset = 18C1h
Bit 7
Read
Write
Reset
1
Field
CA[7:0] Comparator A Low
The Comparator A Low compare bits control whether Comparator A will compare the address bus bits
[7:0] to a logic 1 or logic 0.
0 Compare corresponding address bit to a logic 0.
1 Compare corresponding address bit to a logic 1.
NXP Semiconductors
DBG_CAH field descriptions
NOTE
6 5
1 1
DBG_CAL field descriptions
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
Description
4 3
CA[7:0]
1 1
Description
Chapter 28 Debug module (DBG)
2 1
1 1
0
0
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