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Field
0
Transmitter active (sending data, a preamble, or a break).
1
Transmitter idle (transmission activity complete).
5
Receive Data Register Full Flag
RDRF
RDRF becomes set when a character transfers from the receive shifter into the receive data register
(SCI_D). To clear RDRF, read SCI_S1 with RDRF set and then read the SCI data register (SCI_D).
0
Receive data register empty.
1
Receive data register full.
4
Idle Line Flag
IDLE
IDLE is set when the SCI receive line becomes idle for a full character time after a period of activity. When
ILT is cleared, the receiver starts counting idle bit times after the start bit. If the receive character is all 1s,
these bit times and the stop bits time count toward the full character time of logic high, 10 or 11 bit times
depending on the M control bit, needed for the receiver to detect an idle line. When ILT is set, the receiver
doesn't start counting idle bit times until after the stop bits. The stop bits and any logic high bit times at the
end of the previous character do not count toward the full character time of logic high needed for the
receiver to detect an idle line.
To clear IDLE, read SCI_S1 with IDLE set and then read the SCI data register (SCI_D). After IDLE has
been cleared, it cannot become set again until after a new character has been received and RDRF has
been set. IDLE is set only once even if the receive line remains idle for an extended period.
0
No idle line detected.
1
Idle line was detected.
3
Receiver Overrun Flag
OR
OR is set when a new serial character is ready to be transferred to the receive data register (buffer), but
the previously received character has not been read from SCI_D yet. In this case, the new character, and
all associated error information, is lost because there is no room to move it into SCI_D. To clear OR, read
SCI_S1 with OR set and then read the SCI data register (SCI_D).
0
No overrun.
1
Receive overrun (new SCI data lost).
2
Noise Flag
NF
The advanced sampling technique used in the receiver takes seven samples during the start bit and three
samples in each data bit and the stop bits. If any of these samples disagrees with the rest of the samples
within any bit time in the frame, the flag NF is set at the same time as RDRF is set for the character. To
clear NF, read SCI_S1 and then read the SCI data register (SCI_D).
0
No noise detected.
1
Noise detected in the received character in SCI_D.
1
Framing Error Flag
FE
FE is set at the same time as RDRF when the receiver detects a logic 0 where the stop bits was expected.
This suggests the receiver was not properly aligned to a character frame. To clear FE, read SCI_S1 with
FE set and then read the SCI data register (SCI_D).
0
No framing error detected. This does not guarantee the framing is correct.
1
Framing error.
0
Parity Error Flag
PF
NXP Semiconductors
SCIx_S1 field descriptions (continued)
Table continues on the next page...
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
Chapter 22 Serial Communications Interface (SCI)
Description
405
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