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User software must disable the peripheral before disabling the
clocks to the peripheral. When clocks to a peripheral are re-
enabled, the peripheral registers need to be re-initialized by user
software.
In stop modes, the bus clock is disabled for all gated peripherals, regardless of the setting
in SIM_SCGCx (x=1,2,3) registers.
NXP Semiconductors
Note
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
Chapter 5 Clock management
69
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