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Field
7
Sample Enable
SE
At any given time, either SE or WE can be set. If a write to this register attempts to set both, then SE is set
and WE is cleared. However, avoid writing ones to both bit locations because this "11" case is reserved
and may change in future implementations.
0
Sampling mode not selected.
1
Sampling mode selected.
6
Windowing Enable
WE
At any given time, either SE or WE can be set. If a write to this register attempts to set both, then SE is set
and WE is cleared. However, avoid writing ones to both bit locations because this "11" case is reserved
and may change in future implementations.
0
Windowing mode not selected.
1
Windowing mode selected.
5
This field is reserved.
Reserved
This read-only field is reserved and always has the value 0.
4
Power Mode Select
PMODE
0
Low Speed (LS) comparison mode selected.
1
High Speed (HS) comparison mode selected.
3
GDU Comparator INVERT
INV
This bit allows you to select the polarity of the GDU analog comparator function. It is also driven to the
COUT output (on both the device pin and as SCR[COUT]) when CR1[OPE]=0.
0
Does not invert the GDU comparator output.
1
Inverts the GDU comparator output.
2
Comparator Output Select
COS
NOTE: This field is always disabled in this device, writing 1 to this field does not take effect.
0
Set CMPO to equal COUT (filtered comparator output).
1
Set CMPO to equal COUTA (unfiltered comparator output).
1
Comparator Output Pin Enable
OPE
NOTE: This field is always disabled in this device, writing 1 to this field does not take effect.
0
The comparator output (CMPO) is not available on the associated CMPO output pin.
1
The comparator output (CMPO) is available on the associated CMPO output pin.
0
Comparator Module Enable
EN
The EN bit enables the Analog Comparator Module. When the module is not enabled, it remains in the off
state, and consumes no power. When you select the same input from analog mux to the positive and
negative port, the comparator is disabled automatically.
0
Analog Comparator disabled.
1
Analog Comparator enabled.
NXP Semiconductors
GDU_PHCMP2CR1 field descriptions
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
Chapter 25 Gate Drive Unit (GDU)
Description
447
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