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Memory map and register definition
Absolute
address
(hex)
70
Status and Control (FTM0_SC)
71
Counter High (FTM0_CNTH)
72
Counter Low (FTM0_CNTL)
73
Modulo High (FTM0_MODH)
74
Modulo Low (FTM0_MODL)
75
Channel Status and Control (FTM0_C0SC)
76
Channel Value High (FTM0_C0VH)
77
Channel Value Low (FTM0_C0VL)
78
Channel Status and Control (FTM0_C1SC)
79
Channel Value High (FTM0_C1VH)
7A
Channel Value Low (FTM0_C1VL)
19.4.3 Status and Control (FTMx_SC)
SC contains the overflow status flag and control bits used to configure the interrupt
enable, FTM configuration, clock source, and prescaler factor. These controls relate to all
channels within this module.
Address: 70h base + 0h offset = 70h
Bit
7
Read
TOF
Write
0
Reset
0
Field
7
Timer Overflow Flag
TOF
Set by hardware when the FTM counter passes the value in the Counter Modulo registers. The TOF bit is
cleared by reading the SC register while TOF is set and then writing a 0 to TOF bit. Writing a 1 to TOF has
no effect.
If another FTM overflow occurs between the read and write operations, the write operation has no effect;
therefore, TOF remains set indicating an overflow has occurred. In this case a TOF interrupt request is not
lost due to the clearing sequence for a previous TOF.
0
FTM counter has not overflowed.
1
FTM counter has overflowed.
6
Timer Overflow Interrupt Enable
TOIE
Enables FTM overflow interrupts.
322
FTM memory map
Register name
6
5
TOIE
CPWMS
0
0
FTMx_SC field descriptions
Table continues on the next page...
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
Width
Access
(in bits)
8
R/W
8
R/W
8
R/W
8
R/W
8
R/W
8
R/W
8
R/W
8
R/W
8
R/W
8
R/W
8
R/W
4
3
CLKS
0
0
Description
Section/
Reset value
page
00h
19.4.3/322
00h
19.4.4/323
00h
19.4.5/324
00h
19.4.6/324
00h
19.4.7/325
00h
19.4.8/326
00h
19.4.9/327
00h
19.4.10/328
00h
19.4.8/326
00h
19.4.9/327
00h
19.4.10/328
2
1
PS
0
0
NXP Semiconductors
0
0
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