Debug Comparator C High Register (Dbg_Cch) - NXP Semiconductors MC9S08SU16 Reference Manual

Field
CB[7:0] Comparator B Low
The Comparator B Low compare bits control whether Comparator B will compare the address bus bits
[7:0] to a logic 1 or logic 0.
0 Compare corresponding address bit to a logic 0.
1 Compare corresponding address bit to a logic 1.

28.3.5 Debug Comparator C High Register (DBG_CCH)

All the bits in this register reset to 0 in POR or non-end-run
reset. The bits are undefined in end-run reset. In the case of an
end-trace to reset where DBGEN = 1 and BEGIN = 0, the bits
in this register do not change after reset.
Address: 18C0h base + 4h offset = 18C4h
Bit 7
Read
Write
Reset
0
Field
CC[15:8] Comparator C High Compare Bits
The Comparator C High compare bits control whether Comparator C will compare the address bus bits
[15:8] to a logic 1 or logic 0.
0 Compare corresponding address bit to a logic 0.
1 Compare corresponding address bit to a logic 1.
NXP Semiconductors
DBG_CBL field descriptions
NOTE
6 5
0 0
DBG_CCH field descriptions
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
Description
4 3
CC[15:8]
0 0
Description
Chapter 28 Debug module (DBG)
2 1
0 0
0
0
555