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Chapter 28 Debug module (DBG)
When the DBG_C[ARM] and DBG_C[DBGEN] bits are set to one in loop1 capture
mode, comparator C value registers are cleared to prevent the previous contents of these
registers from interfering with the loop1 capture mode operation. When a COF event is
detected, the address of the event is compared to the contents of the DBG_CCH and
DBG_CCL registers to determine whether it is the same as the previous COF entry in the
capture FIFO. If the values match, the capture is inhibited to prevent the FIFO from
filling up with duplicate entries. If the values do not match, the COF event is captured
into the FIFO and the DBG_CCH and DBG_CCL registers are updated to reflect the
address of the captured COF event.
28.4.2 Breakpoints
A breakpoint request to the CPU at the end of a trace run can be created if the
DBG_C[BRKEN] bit is set. The value of the DBG_T[BEGIN] bit determines when the
breakpoint request to the CPU will occur. If the DBG_T[BEGIN] bit is set, begin-trigger
is selected and the breakpoint request will not occur until the FIFO is filled with 8 words.
If the DBG_T[BEGIN] bit is cleared, end-trigger is selected and the breakpoint request
will occur immediately at the trigger cycle.
When traditional hardware breakpoints from comparators A or B are desired, set
DBG_T[BEGIN] = 0 to select an end-trace run and set the trigger mode to either 0x0 (A-
only) or 0x1 (A OR B) mode.
There are two types of breakpoint requests supported by the DBG module, tag-type and
force-type. Tagged breakpoints are associated with opcode addresses and allow breaking
just before a specific instruction executes. Force breakpoints are not associated with
opcode addresses. The DBG_C[TAG] bit determines whether CPU breakpoint requests
will be a tag-type or force-type breakpoints. When DBG_C[TAG] = 0, a force-type
breakpoint is requested and it will take effect at the next instruction boundary after the
request. When DBG_C[TAG] = 1, a tag-type breakpoint is registered into the instruction
queue and the CPU will break if/when this tag reaches the head of the instruction queue
and the tagged instruction is about to be executed.
28.4.2.1 Hardware breakpoints
Comparators A, B, and C can be used as three traditional hardware breakpoints whether
the on-chip ICE real-time capture function is required or not. To use any breakpoint or
trace run capture functions set DBG_C[DBGEN] = 1. DBG_C[BRKEN] and
DBG_C[TAG] affect all three comparators. When DBG_C[BRKEN] = 0, no CPU
breakpoints are enabled. When DBG_C[BRKEN] = 1, CPU breakpoints are enabled and
the DBG_C[TAG] bit determines whether the breakpoints will be tag-type or force-type
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
NXP Semiconductors
567
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