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Functional description
Duty Cycle = (PWM value/Modulus)× 100
A PWM value less than, or equal to zero deactivates the PWM
output for the entire PWM period. A PWM value greater than,
or equal to the modulus activates the PWM output for the entire
PWM period when CINVx=0, and vice versa if CINVx=1.
PWMVALn
0x0000–0x7FFF
0x8000–0xFFFF
A center-aligned operation is illustrated in the following figure. The pulse width is twice
the value written to the PWM value register with center-aligned output in PWM clock
cycles.
PWM pulse width = (PWM value) × (PWM clock period) × 2
Up/Down Counter
Modulus = 4
PWM Value = 0
0/4 = 0%
PWM Value = 1
1/4 = 25%
PWM Value = 2
2/4 = 50%
PWM Value = 3
3/4 = 75%
PWM Value = 4
4/4 = 100%
An edge-aligned operation is illustrated in the following figure. The pulse width is the
value written to the PWM value register with edge-aligned output in PWM clock cycles.
PWM pulse width = (PWM value) × (PWM clock period)
488
Table 26-3. PWM value and underflow conditions
4
3
2
1
0
Figure 26-7. Center-Aligned PWM pulse width
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
NOTE
Condition
Normal
Underflow
PWM value used
Value in registers $8000–$
0x0000
NXP Semiconductors
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