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When BDM is active, this write coherency mechanism is frozen such that the buffer
latches remain in the state they were in when the BDM became active, even if one or both
bytes of the modulo register are written while BDM is active. Any write to the modulo
register bypasses the buffer latches and directly writes to the modulo register while BDM
is active.
It is recommended to initialize the FTM counter, by writing to CNTH or CNTL, before
writing to the FTM modulo register to avoid confusion about when the first counter
overflow will occur.
Address: 70h base + 3h offset = 73h
Bit
7
Read
Write
Reset
0
Field
MOD_H
High byte of the modulo value
19.4.7 Modulo Low (FTMx_MODL)
See the description for the Modulo High register.
Address: 70h base + 4h offset = 74h
Bit
7
Read
Write
Reset
0
Field
MOD_L
Low byte of the modulo value
NXP Semiconductors
6
5
0
0
FTMx_MODH field descriptions
6
5
0
0
FTMx_MODL field descriptions
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
Chapter 19 FlexTimer Module (FTM)
4
3
MOD_H
0
0
Description
4
3
MOD_L
0
0
Description
2
1
0
0
2
1
0
0
0
0
0
0
325
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