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Functional description
The n
channel fetch
Channel FIFO fulfilled
Start FIFOed Conversion
0
The n
channel fetch
Channel FIFO fulfilled
Start FIFOed Conversion
0
when n hardware trigger occurs
Channel FIFO fulfilled
Start FIFOed Conversion
when 1st hardware trigger occurs
0
Channel FIFO fulfilled
Start FIFOed Conversion
when 1st hardware trigger occurs
0
Channel FIFO fulfilled
Start FIFOed Conversion
when hardware trigger occurs
0
278
AD
th
max = AFDEP
n
max
COCO = 1
The n
AD
th
Conversions Completed
result store
AD
th
max = AFDEP
max
0
n
ADC_SC1[COCO] = 1
The n
AD
th
Conversions Completed
result store
The n
AD
th
channel fetch
when last hardware trigger occurs
n
The n
AD
th
result store
The n
AD
th
channel fetch
n
The n
AD
th
result store
The n
AD
th
channel fetch
n
The n
AD
th
result store
Figure 17-3. ADC FIFO conversion sequence
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
Software Triggered Single Conversion
max
n
Software Triggered Continuous Conversion
max = AFDEP
If new trigger occurs, the new set conversions will be generated
max
Hardware Triggered Single Conversion
ADC_SC1[COCO] = 1
Conversions Completed
max = AFDEP
If new trigger occurs, the new set conversions will be generated
max
Hardware Triggered Multiple Conversion
ADC_SC1[COCO] = 1
Conversions Completed
max = AFDEP
max
0
Hardware Triggered Continuous Conversion
(Only need one hardware trigger)
COCO = 1
Conversions Completed
n
0
ADC_SC4[HTRGME]=0
ADC_SC4[HTRGME]=1
n
NXP Semiconductors
max
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