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The transmitter output (TxD) idle state defaults to logic high, SCI_C3[TXINV] is cleared
following reset. The transmitter output is inverted by setting SCI_C3[TXINV]. The
transmitter is enabled by setting the TE bit in SCI_C2. This queues a preamble character
that is one full character frame of the idle state. The transmitter then remains idle until
data is available in the transmit data buffer. Programs store data into the transmit data
buffer by writing to the SCI data register (SCI_D).
The central element of the SCI transmitter is the transmit shift register that is 10 or 11 or
12 bits long depending on the setting in the SCI_C1[M] control bit and SCI_BDH[SBNS]
bit. For the remainder of this section, assume SCI_C1[M] is cleared, SCI_BDH[SBNS] is
also cleared, selecting the normal 8-bit data mode. In 8-bit data mode, the shift register
holds a start bit, eight data bits, and a stop bit. When the transmit shift register is
available for a new SCI character, the value waiting in the transmit data register is
transferred to the shift register, synchronized with the baud rate clock, and the transmit
data register empty (SCI_S1[TDRE]) status flag is set to indicate another character may
be written to the transmit data buffer at SCI_D.
Always read SCI_S1 before writing to SCI_D to allow data to
be transmitted.
If no new character is waiting in the transmit data buffer after a stop bit is shifted out the
TxD pin, the transmitter sets the transmit complete flag and enters an idle mode, with
TxD high, waiting for more characters to transmit.
Writing 0 to SCI_C2[TE] does not immediately release the pin to be a general-purpose
I/O pin. Any transmit activity in progress must first be completed. This includes data
characters in progress, queued idle characters, and queued break characters.
22.5.2.1 Send break and queued idle
SCI_C2[SBK] sends break characters originally used to gain the attention of old teletype
receivers. Break characters are a full character time of logic 0, 10 bit times including the
start and stop bits. A longer break of 13 bit times can be enabled by setting
SCI_S2[BRK13]. Normally, a program would wait for SCI_S1[TDRE] to become set to
indicate the last character of a message has moved to the transmit shifter, write 1, and
then write 0 to SCI_C2[SBK]. This action queues a break character to be sent as soon as
the shifter is available. If SCI_C2[SBK] remains 1 when the queued break moves into the
shifter, synchronized to the baud rate clock, an additional break character is queued. If
the receiving device is another NXP SCI, the break characters are received as 0s in all
eight data bits and a framing error (SCI_S1[FE] = 1) occurs.
NXP Semiconductors
NOTE
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
Chapter 22 Serial Communications Interface (SCI)
411
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