Sampled, Non-Filtered Mode (#S 3A & 3B) - NXP Semiconductors MC9S08SU16 Reference Manual

CMP Functional Description
EN,PMODE,HYSTCTR
INP
INM
bus clock
FILT_PER
Figure 18-3. Comparator Operation in Continuous Mode
Refer to the chip configuration section for the source of sample/
window input.
The analog comparator block is powered and active. CMPO may be optionally inverted,
but is not subject to external sampling or filtering. Both Window Control and Filter
Blocks are completely bypassed. SCR[COUT] is updated continuously. The path from
comparator inputs pins to output pin is operating in combinational (unclocked) mode.
COUT and COUTA are identical.
For control configurations which result in disabling the Filter Block, refer to
Bypass Logic diagram.
18.11.1.3 Sampled, Non-Filtered Mode (#s 3A & 3B)
304
INTERNAL BUS
FILT_PER
COS INV
+
Polarity
Select
-
CMPO
WINDOW/SAMPLE
Clock
divided
Prescaler
bus
clock
NOTE
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
OPE
FILTER_CNT SE COUT
WE
0
Window
Filter
Control
Block
1
0
COUTA
CGMUX
SE
IER/F CFR/F
Interrupt
Control
IRQ
COUT
(TO OTHER SOC FUNCTIONS))
0
CMPO to
1
PAD
COS
Filter Block
NXP Semiconductors