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The terms activate and deactivate refer to the high and low
logic states of the PWM outputs.
Address: 40h base + Ch offset + (2d × i), where i=0d to 5d
Bit
7
Read
Write
Reset
0
Field
PMVAL7_0
PWM Pulse Width Value7:0
26.4.14 PWM Value Register: High (PWM_VALnH)
The 16-bit signed value in these buffered, read/write registers defines the PWM pulse
width in PWM clock periods for each PWM output channel.
The PWM value registers are buffered. The value written does
not take effect until the LDOK bit is set and the next PWM load
cycle begins. Reading VALn reads the value in a buffer and not
necessarily the value the PWM generator is currently using.
A PWM value less than or equal to zero deactivates the PWM output for the entire PWM
period. A PWM value greater than, or equal to the modulus, activates the PWM output
for the entire PWM period.
The terms activate and deactivate refer to the high and low
logic states of the PWM outputs.
Address: 40h base + Dh offset + (2d × i), where i=0d to 5d
Bit
7
Read
Write
Reset
0
Field
PMVAL15_8
PWM Pulse Width Value 15:8
NXP Semiconductors
NOTE
6
5
0
0
PWM_VALnL field descriptions
NOTE
NOTE
6
5
0
0
PWM_VALnH field descriptions
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
Chapter 26 Pulse Width Modulator (PWM)
4
3
PMVAL7_0
0
0
Description
4
3
PMVAL15_8
0
0
Description
2
1
0
0
2
1
0
0
0
0
0
0
517
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