Table of Contents
Advertisement
ADC Control Registers
ADC_RH is updated each time a conversion completes except when automatic compare
is enabled and the compare condition is not met. Reading ADC_RH prevents the ADC
from transferring subsequent conversion results into the result registers until ADC_RL is
read. If ADC_RL is not read until after the next conversion is completed, the intermediate
conversion result is lost. In 8-bit mode, there is no interlocking with ADC_RL.
When FIFO is enabled, the result FIFO is read via ADC_RH:ADC_RL. The ADC
conversion completes when the input channel FIFO is fulfilled at the depth indicated by
the AFDEP. The AD result FIFO can be read via ADC_RH:ADC_RL continuously by
the order set in analog input channel ADCH.
If the MODE bits are changed, any data in ADC_RH becomes invalid.
Address: Base address + 4h offset
Bit
7
Read
Write
Reset
0
Field
7–4
This field is reserved.
Reserved
This read-only field is reserved and always has the value 0.
ADR
Conversion Result[12:8]
17.4.6 Conversion Result Low Register (ADCx_RL)
ADC_RL contains the lower eight bits of the result of a 12-bit conversion. This register is
updated each time a conversion completes except when automatic compare is enabled
and the compare condition is not met. In 12-bit mode, reading ADC_RH prevents the
ADC from transferring subsequent conversion results into the result registers until
ADC_RL is read. If ADC_RL is not read until the next conversion is completed, the
intermediate conversion results are lost. In 8-bit mode, there is no interlocking with
ADC_RH. If the MODE bits are changed, any data in ADC_RL becomes invalid.
When FIFO is enabled, the result FIFO is read via ADC_RH:ADC_RL. The ADC
conversion completes when the input channel FIFO is fulfilled at the depth indicated by
the AFDEP. The AD result FIFO can be read via ADC_RH:ADC_RL continuously by
the order set in analog input channel FIFO.
268
6
5
0
0
0
ADCx_RH field descriptions
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
4
3
0
0
Description
2
1
ADR
0
0
NXP Semiconductors
0
0
Advertisement
Table of Contents
