NXP Semiconductors MC9S08SU16 Reference Manual page 50

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Register addresses assignments
Table 3-2. Peripheral registers availability (continued)
Address
Bytes
0x18E0—0x18E0
0x18E1—0x18E1
0x18E2—0x18E2
0x18E3—0x18E5
0x18E6—0x18E6
0x18E7—0x18EB
0x18EC—0x18EF
0x18F0—0x18F7
0x18F8—0x18FF
Several reserved flash memory locations, shown in the following table, are used for
storing values used by several registers. These registers include an 8-byte backdoor key,
NV_BACKKEY, which can be used to gain access to secure memory resources. During
reset events, the contents of NVPROT and NVOPT in the reserved flash memory are
transferred into corresponding FPROT and FOPT registers in the high-page registers area
to control security and block protection options
Address
Register Name
0xFF6E
NV_FTRIM
0xFF6F
NV_ICSTRM
0xFF70
NV_BACKKEY0
0xFF71
NV_BACKKEY1
0xFF72
NV_BACKKEY2
0xFF73
NV_BACKKEY3
0xFF74
NV_BACKKEY4
0xFF75
NV_BACKKEY5
0xFF76
NV_BACKKEY6
0xFF77
NV_BACKKEY7
0xFF78
0xFF79
0xFF7A
0xFF7B
0xFF7C
NV_FPROT
0xFF7D
0xFF7E
NV_FOPT
0xFF7F
NV_FSEC
50
Peripheral
1
PTA
1
PTB
1
PTC
3
1
PTB
5
4
PTx
8
8
SIM
Table 3-3. Reserved flash memory addresses
Bit 7
Reserved
Reserved
Reserved
Reserved
FPOPE
N
Reserved
KEYEN
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
Peripheral registers
PORT_PTAPE
PORT_PTBPE
PORT_PTCPE
Reserved
PORT_PTBHD
Reserved
PORT_FCLKDIV, PORT_IOFLT0,
PORT_IOFLT1, PORT_IOFLT2
Reserved
SIM_UUID0—SIM_UUID7
6
5
4
TRIM
BACKKEY0
BACKKEY1
BACKKEY2
BACKKEY3
BACKKEY4
BACKKEY5
BACKKEY6
BACKKEY7
FPHDIS
FPH
1
1
Comment
Port pull-up enable
Port high drive enable
Port Filter for pins
64-bit unique ID
3
2
1
NV
1
1
NXP Semiconductors
Bit 0
FTRIM
SEC

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