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9.8.2 System Background Debug Force Reset Register (SIM_SBDFR)
This register contains a single write-only control bit. A serial background command such
as WRITE_BYTE must be used to write to SIM_SBDFR. Attempts to write this register
from a user program are ignored. Reads always return 0x00.
This register is the same as the BDC_SBDFR.
Address: 1800h base + 1h offset = 1801h
Bit
7
Read
Write
Reset
0
Field
7–1
This field is reserved.
Reserved
This read-only field is reserved and always has the value 0.
0
Background Debug Force Reset
BDFR
A serial background command such as WRITE_BYTE may be used to allow an external debug host to
force a target system reset. Writing logic 1 to this bit forces an MCU reset. This bit cannot be written from
a user program.
NOTE: BDFR is writable only through serial background debug commands, not from user programs.
9.8.3 System Device Identification Register: High (SIM_SDIDH)
This read-only register, together with SDIDL, is included so that host development
systems can identify the HCS08 derivative and revision number. This allows the
development software to recognize where specific memory blocks, registers, and control
bits are located in a target MCU.
Address: 1800h base + 2h offset = 1802h
Bit
7
Read
Write
Reset
0
NXP Semiconductors
NOTE
6
5
0
0
SIM_SBDFR field descriptions
6
5
Reserved
0
0
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
Chapter 9 System Integration Module (SIM)
4
3
0
0
0
Description
4
3
0
0
2
1
BDFR
0
0
2
1
ID
0
0
0
0
0
0
0
107
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