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Field
0
The temperature sensor offset is disabled. TOT[3:0] takes no effect.
1
The temperature sense offset is enabled. TOT[3:0] selects the temperature offset value. See
for more details.
6–4
This field is reserved.
Reserved
This read-only field is reserved and always has the value 0.
TOT[3:0]
Temperature Offset step Trim
These bits are used to trim the temperature offset. TOT[3:0] determines the trim value for assert or de-
assert of system interrupt. Refer to the electrical specifications information in the chip datasheet to get the
detailed values.
NOTE: After de-assert of system reset, a trim value is automatically loaded from the flash memory.
NOTE: TOT[3:0] can be cleared only by POR.
14.7.5 RC Oscillator Offset Step Trim Register (PMC_RC20KTRM)
Address: 1850h base + 4h offset = 1854h
Bit
7
Read
0
Write
Reset
0
Field
7–6
This field is reserved.
Reserved
This read-only field is reserved and always has the value 0.
OSCOT[5:0]
RC Oscillator Offset step Trim
These bits are defined as the step trim values for the RC oscillator offset. Refer to the electrical
specifications information in the chip datasheet to get the detailed values.
NOTE: After de-assert of system reset, a trim value is automatically loaded from the flash memory.
NXP Semiconductors
PMC_TPTM field descriptions (continued)
Normal IPS writable only after PMC_CTRL[GWREN] is set.
6
5
0
0
PMC_RC20KTRM field descriptions
Normal IPS writable only after PMC_CTRL[GWREN] is set.
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
Chapter 14 Power Management Controller (PMC)
Description
4
3
OSCOT[5:0]
1
1
Description
TOT[3:0]
2
1
1
1
0
1
225
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