Trigger Selection - NXP Semiconductors MC9S08SU16 Reference Manual

Functional description
breakpoints. To use comparators A and B as hardware breakpoints, set DBG_T = 0x81
for tag-type breakpoints and 0x01 for force-type breakpoints. This sets up an end-type
trace with trigger mode "A OR B".
Comparator C is not involved in the trigger logic for the on-chip ICE system.

28.4.3 Trigger selection

The DBG_T[TRGSEL] bit is used to determine the triggering condition of the on-chip
ICE system. DBG_T[TRGSEL] applies to both trigger A and B except in the event only
trigger modes. By setting the DBG_T[TRGSEL] bit, the comparators will qualify a match
with the output of opcode tracking logic. The opcode tracking logic is internal to each
comparator and determines whether the CPU executed the opcode at the compare
address. With the DBG_T[TRGSEL] bit cleared a comparator match is all that is
necessary for a trigger condition to be met.
If the DBG_T[TRGSEL] is set, the address stored in the
comparator match address registers must be an opcode address
for the trigger to occur.
28.4.4 Trigger break control (TBC)
The TBC is the main controller for the DBG module. Its function is to decide whether
data should be stored in the FIFO based on the trigger mode and the match signals from
the comparator. The TBC also determines whether a request to break the CPU should
occur.
The DBG_C[TAG] bit controls whether CPU breakpoints are treated as tag-type or force-
type breakpoints. The DBG_T[TRGSEL] bit controls whether a comparator A or B
match is further qualified by opcode tracking logic. Each comparator has a separate
circuit to track opcodes because the comparators could correspond to separate
instructions that could be propagating through the instruction queue at the same time.
In end-type trace runs (DBG_T[BEGIN] = 0), when the comparator registers match,
including the optional R/W match, this signal goes to the CPU break logic where
DBG_C[BRKEN] determines whether a CPU break is requested and the DBG_C[TAG]
control bit determines whether the CPU break will be a tag-type or force-type breakpoint.
When DBG_T[TRGSEL] is set, the R/W qualified comparator match signal also passes
through the opcode tracking logic. If/when it propagates through this logic, it will cause a
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NOTE
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
NXP Semiconductors