NXP Semiconductors MC9S08SU16 Reference Manual page 11

Section number
12.1.3.1
12.1.3.2
12.1.3.3
12.1.3.4
12.1.3.5
12.1.3.6
12.1.3.7
12.2 External signal description............................................................................................................................................191
12.3 Register definition.........................................................................................................................................................192
12.3.1 ICS Control Register 1 (ICS_C1).................................................................................................................. 192
12.3.2 ICS Control Register 2 (ICS_C2).................................................................................................................. 193
12.3.3 ICS Control Register 3 (ICS_C3).................................................................................................................. 194
12.3.4 ICS Control Register 4 (ICS_C4).................................................................................................................. 195
12.3.5 ICS Status Register (ICS_S).......................................................................................................................... 196
12.4 Functional description...................................................................................................................................................197
12.4.1 Operational modes......................................................................................................................................... 197
12.4.1.1
12.4.1.2
12.4.1.3
12.4.1.4
12.4.1.5
12.4.1.6
12.4.1.7
12.4.2 Mode switching..............................................................................................................................................199
12.4.3 Bus frequency divider.................................................................................................................................... 200
12.4.4 Low-power field usage...................................................................................................................................200
12.4.5 Internal reference clock..................................................................................................................................200
12.4.6 Fixed frequency clock.................................................................................................................................... 201
12.4.7 FLL lock and clock monitor...........................................................................................................................201
NXP Semiconductors
FLL engaged internal (FEI)....................................................................................................... 190
FLL engaged external (FEE)......................................................................................................190
FLL bypassed internal (FBI)......................................................................................................191
FLL bypassed internal low power (FBILP)............................................................................... 191
FLL bypassed external (FBE).................................................................................................... 191
FLL bypassed external low power (FBELP)............................................................................. 191
Stop (STOP)............................................................................................................................... 191
FLL engaged internal (FEI)....................................................................................................... 197
FLL engaged external (FEE)......................................................................................................198
FLL bypassed internal (FBI)......................................................................................................198
FLL bypassed internal low power (FBILP)............................................................................... 198
FLL bypassed external (FBE).................................................................................................... 199
FLL bypassed external low power (FBELP)............................................................................. 199
Stop............................................................................................................................................ 199
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
Title Page
11