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17.1.3 ADC analog supply and reference connections
This device does not have dedicated VDDA and VSSA pins. PMC provides a dedicated
4.2V voltage reference for the msot on-chip analog circuits. ADC analog supply and
reference connections are below:
• Analog Power (V
power connection. It is star connection to V
• Analog Ground(V
connection. It is star connection to V
• Voltage Reference High (V
connected internally to V
voltage reference for PMC. PMC V
connect external V
• Voltage Reference Low (V
star connection to V
Each V
capacitor respectively
17.1.4 Alternate clock
The ADC module is capable of performing conversions using the MCU bus clock, the
bus clock divided by two, the local asynchronous clock (ADACK) within the module, or
the alternate clock (ALTCLK). The alternate clock for the devices is the external clock
input (CLKIN).
The selected clock source must run at a frequency such that the ADC conversion clock
(ADCK) runs within its specified range (f
clock sources as determined by the ADIV bits.
ALTCLK is active while the MCU is in wait mode provided the conditions described
above are met. This allows ALTCLK to be used as the conversion clock source for the
ADC while the MCU is in wait mode.
ALTCLK cannot be used as the ADC conversion clock source while the MCU is in stop
mode.
NXP Semiconductors
) - The ADC analog portion uses V
DDAD
) - The ADC analog portion uses V
SSAD
) - The high reference voltage for the converter. It is
REFH
pad which is the output of a high accuracy 4.2 V
REFH
REFH
or enable internal V
REFH
) - the low-reference voltage for the converter. It is
REFL
pin on package.
SS
and V
pins must be connected to an output load
DDX
refh
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
Chapter 17 Analog-to-digital converter (ADC)
pad.
DDX
pad.
SS
is disabled by default. Customer must
regulator.
REFH
NOTE
) after being divided down from one of
ADCK
from PMC as its
DDX
as its groudn
SS
257
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