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25.6.20 LIMIT0 CMP Status and Control Register (GDU_LIMIT0SCR)................................................................. 455
25.6.21 LIMIT0 DAC Control Register (GDU_LIMIT0DACCR)............................................................................ 456
25.6.22 LIMIT1 CMP Control Register 0 (GDU_LIMIT1CR0)................................................................................456
25.6.23 LIMIT1 CMP Control Register 1 (GDU_LIMIT1CR1)................................................................................457
25.6.24 LIMIT1 CMP Filter Period Register (GDU_LIMIT1FPR)........................................................................... 458
25.6.25 LIMIT1 CMP Status and Control Register (GDU_LIMIT1SCR)................................................................. 459
25.6.26 LIMIT1 DAC Control Register (GDU_LIMIT1DACCR)............................................................................ 460
25.6.27 PDCS and Clamp Status Register (GDU_STATREG)..................................................................................460
25.6.28 LIMIT CMP BIAS Register (GDU_SIGBIAS).............................................................................................461
25.7
Functional description...................................................................................................................................................461
25.7.1
Phase detection function descriptions............................................................................................................ 462
25.7.1.1
25.7.1.2
25.7.2
OpAMP function descriptions....................................................................................................................... 463
25.7.2.1
25.7.2.2
25.7.3
Predrive function descriptions....................................................................................................................... 464
25.7.3.1
25.7.3.2
25.7.4
GCMP functional description........................................................................................................................ 465
25.7.4.1
25.7.4.2
25.7.4.3
25.7.4.4
25.7.4.5
25.7.4.6
25.8
GCMP interrupts...........................................................................................................................................................480
NXP Semiconductors
Phase detection diagram.............................................................................................................462
Phase detection descriptions...................................................................................................... 462
OpAMP diagram........................................................................................................................ 463
OpAMP descriptions..................................................................................................................464
Predrive diagram........................................................................................................................ 464
Predrive descriptions..................................................................................................................465
GCMP diagram.......................................................................................................................... 465
GCMP block diagram................................................................................................................ 466
GCMP functional modes............................................................................................................468
Power modes.............................................................................................................................. 477
Startup and operation................................................................................................................. 478
Chapter 26
Pulse Width Modulator (PWM)
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
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