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Application information
• If inductive isolation is used from the primary supply, an additional 1 µF capacitor is
placed from V
DDA
• V
(and V
SSA
REFL
plane.
• Operate the MCU in wait or Stop mode before initiating (hardware triggered
conversions) or immediately after initiating (hardware or software triggered
conversions) the ADC conversion.
• For software triggered conversions, immediately follow the write to ADC_SC1
with a wait instruction or stop instruction.
• For Stop mode operation, select ADACK as the clock source. Operation in Stop
reduces V
DD
• There is no I/O switching, input or output, on the MCU during the conversion.
There are some situations where external system activity causes radiated or conducted
noise emissions or excessive V
when the MCU cannot be placed in wait or Stop or I/O activity cannot be halted, these
recommended actions may reduce the effect of noise on the accuracy:
• Place a 0.01 µF capacitor (C
improves noise issues, but affects the sample rate based on the external analog source
resistance).
• Average the result by converting the analog input many times in succession and
dividing the sum of the results. Four samples are required to eliminate the effect of a
1LSB, one-time error.
• Reduce the effect of synchronous noise by operating off the asynchronous clock
(ADACK) and averaging. Noise that is synchronous to ADCK cannot be averaged
out.
17.7.2.4 Code width and quantization error
The ADC quantizes the ideal straight-line transfer function into 4096 steps (in 12-bit
mode). Each step ideally has the same height (1 code) and width. The width is defined as
the delta between the transition points to one code and the next. The ideal code width for
an N bit converter (in this case N can be 8, 10 or 12), defined as 1LSB, is:
286
to V
.
SSA
, if connected) is connected to V
noise but increases effective conversion time due to stop recovery.
noise is coupled into the ADC. In these situations, or
DD
) on the selected input channel to V
AS
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
at a quiet point in the ground
SS
REFL
or V
(this
SSA
NXP Semiconductors
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