NXP Semiconductors MC9S08SU16 Reference Manual page 49

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Table 3-2. Peripheral registers availability (continued)
Address
Bytes
0x1830—0x183C
16
0x183D—0x1847
11
0x1848—0x184F
0x1850—0x185F
16
0x1860—0x1867
0x1868—0x186F
0x1868—0x186F
0x1870—0x187F
16
0x1880—0x1881
0x1882—0x188F
16
0x1890—0x1898
0x1899—0x18AF
23
0x18B0—0x18BC
13
0x18BD—0x18BF
0x18C0—0x18CF
16
0x18D0—0x18DF
16
NXP Semiconductors
Peripheral
FTMRH_FCLKDIV, FTMRH_FSEC,
FTMRH_FCCOBIX, FTMRH_FCNFG,
FTMRH
FTMRH_FSTAT, FTMRH_FPROT,
FTMRH_FCCOBLO, FTMRH_FOPT
ICS_C1, ICS_C2, ICS_C3, ICS_C4,
8
ICS
PMC_TPCTRLSTAT, PMC_TPTM,
PMC
8
IPC
8
SCI0
8
GDU_CLMPCTRL, GDU_IOCTRL,
GDU_PHASECTRL, GDU_CURCTRL,
GDU_LIMIT0CR0, GDU_LIMIT0CR1,
GDU_LIMIT0FPR, GDU_LIMIT0SCR,
GDU
GDU_LIMIT1CR0, GDU_LIMIT1CR1.
GDU_LIMIT1FPR, GDU_LIMIT1SCR,
2
ILLA
9
CRC
CRC_PL1, CRC_PL0, CRC_CTRL
I2C_D, I2C_C2, I2C_SCS, I2C_RA,
I2C
3
DBG_CAH, DBG_CAL, DBG_CBH,
DBG_CBL, DBG_CCH, DBG_CCL,
DBG
DBG_C, DBG_T, DBG_S, DBG_CNT
XBAR
Table continues on the next page...
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
Peripheral registers
FTMRH_FCCOBHI,
Reserved
ICS_S
PMC_CTRL, PMC_RST,
PMC_RC20KTRM,
PMC_LVCTLSTAT1,
PMC_LVCTLSTAT2,
PMC_VREFHCFG,
PMC_VREFHLVW, PMC_STAT
IPC_ILRS0―IPC_ILRS7
SCI0_BDH, SCI0_BDL,
SCI0_C1, SCI0_C2,
SCI0_S1, SCI0_S2,
SCI0_C3, SCI0_D,
Reserved
GDU_LIMIT0DACCR,
GDU_LIMIT1DACCR,
GDU_STATREG, GDU_SIGBIAS
SIM_ILLAH, SIM_ILLAL
Reserved
CRC_DH1, CRC_DH0, CRC_DL1,
CRC_DL0, CRC_PH1, CRC_PH0,
Reserved
I2C_A1, I2C_F, I2C_C1, I2C_S1,
I2C_SMB, I2C_A2, I2C_SLTH,
I2C_SLTL, I2C_S2
Reserved
DBG_FH, DBG_FL, DBG_CAX,
DBG_CBX, DBG_CCX, DBG_FX,
XBAR_SEL0—XBAR_SEL15
Chapter 3 Memory
Comment
49

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