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Pinout
24
Chip
Module
QFN
signal
name
18
ADC0AD1/
ADC/
AMP0_M /
GCMP/
2
CMP1
CMP
XB_OUT0
XBAR
XB_IN1
XBAR
PTA1/KB1 PORT/K
BI
19
ADC0AD0 /
ADC/
AMP0_P /
GCMP/
2
CMP0
CMP
CLK_IN
XB_IN0
XBAR
PTA0/ KBI0 PORT/K
BI
20
ADC0AD2 /
ADC0/
ADC1AD2 /
ADC1/G
GDU_CMP
DU
2
0
PTB0
PORT
21
ADC0AD3 /
ADC0/
ADC1AD3 /
ADC1/G
GDU_CMP
DU
2
1
80
Table 7-1. Pin signal description (continued)
Module
Operating
signal name
voltage
range (V)
AD1/INM/
0–5
Reference
input 1
XBAR_OUT 1
XBAR_IN 1
PTA1/KBIP1
AD0/INP/
0–5
Reference
input 0
XBAR_IN 0
PTA0/KBIP0
AD2/AD2/
0–5
CMP0
PTB0
AD3/AD3/
0–5
CMP1
Table continues on the next page...
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
Alt
Type
State
1
function
during
reset
Default
I
Input
ALT1
O
ALT2
I
ALT3
I/O
Default
I
Input
ALT1
I
ALT2
I
ALT3
I/O
Default
I
Internal pull
down
ALT3
I/O
Default
I
Internal pull
down
Signal description
ADC0AD1: Input to channel 1
of ADC0;
AMP0_M: GDU analog
operational amplifier 0 negative
input
CMP1: Input 1 of analog
comparator;
Crossbar module output 0
Crossbar module input 1
This GPIO pin can be
individually programmed as an
input or output pin with KBI
functionality
ADC0AD0: Input to channel 0
of ADC0;
AMP0_P: GDU analog
operational amplifier 0 positive
input;
CMP0: Input 0 of analog
comparator;
An optional external clock
source. This clock input cannot
be dynamically switched
between its inputs (DC - 40
MHz)
Crossbar module input 0
This GPIO pin can be
individually programmed as an
input or output pin with KBI
functionality
ADC0AD2: Input to channel 2
of ADC0;
ADC1AD2: Input to channel 2
of ADC1;
GDU_CMP0: GDU phase
comparator 0 positive input
This GPIO pin can be
individually programmed as an
input or output pin.
ADC0AD3: Input to channel 3
of ADC0;
ADC1AD3: Input to channel 3
of ADC1;
GDU_CMP1: GDU Phase
comparator 1 positive input
NXP Semiconductors
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