Sci Control Register 2 (Scix_C2) - NXP Semiconductors MC9S08SU16 Reference Manual

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22.4.4 SCI Control Register 2 (SCIx_C2)

This register can be read or written at any time.
Address: 1868h base + 3h offset = 186Bh
Bit
7
Read
TIE
Write
Reset
0
Field
7
Transmit Interrupt Enable for TDRE
TIE
0
Hardware interrupts from TDRE disabled; use polling.
1
Hardware interrupt requested when TDRE flag is 1.
6
Transmission Complete Interrupt Enable for TC
TCIE
0
Hardware interrupts from TC disabled; use polling.
1
Hardware interrupt requested when TC flag is 1.
5
Receiver Interrupt Enable for RDRF
RIE
0
Hardware interrupts from RDRF disabled; use polling.
1
Hardware interrupt requested when RDRF flag is 1.
4
Idle Line Interrupt Enable for IDLE
ILIE
0
Hardware interrupts from IDLE disabled; use polling.
1
Hardware interrupt requested when IDLE flag is 1.
3
Transmitter Enable
TE
TE must be 1 to use the SCI transmitter. When TE is set, the SCI forces the TxD pin to act as an output
for the SCI system.
When the SCI is configured for single-wire operation (LOOPS = RSRC = 1), TXDIR controls the direction
of traffic on the single SCI communication line (TxD pin).
TE can also queue an idle character by clearing TE then setting TE while a transmission is in progress.
When TE is written to 0, the transmitter keeps control of the port TxD pin until any data, queued idle, or
queued break character finishes transmitting before allowing the pin to revert to a general-purpose I/O pin.
0
Transmitter off.
1
Transmitter on.
2
Receiver Enable
RE
When the SCI receiver is off, the RxD pin reverts to being a general-purpose port I/O pin. If LOOPS is set
the RxD pin reverts to being a general-purpose I/O pin even if RE is set.
0
Receiver off.
1
Receiver on.
1
Receiver Wakeup Control
RWU
NXP Semiconductors
6
5
TCIE
RIE
0
0
SCIx_C2 field descriptions
Table continues on the next page...
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
Chapter 22 Serial Communications Interface (SCI)
4
3
ILIE
TE
0
0
Description
2
1
RE
RWU
SBK
0
0
0
0
403

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