Signal Description - NXP Semiconductors MC9S08SU16 Reference Manual

Signal description

no clock selected
(FTM counter disable)
system clock
fixed frequency clock
external clock
CPWMS
FTM counter
(16-bit counter)
CPWMS
MS0B:MS0A
ELS0B:ELS0A
channel 0
Input capture
input
mode logic
C0VH:L
CPWMS
MS1B:MS1A
ELS1B:ELS1A
channel 1
Input capture
input
mode logic
C1VH:L
CPWMS
MS7B:MS7A
ELS7B:ELS7A
channel 7
Input capture
input
mode logic
C7VH:L
19.3 Signal description
The following table shows the user-accessible signals for the FTM.
320
CLKS[1:0]
synchronizer
MODH:L
Output modes
logic
Output modes
logic
Output modes
logic
Figure 19-1. FTM block diagram
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
PS[2:0]
Prescaler
(1, 2, 4, 8, 16, 32, 64 or 128)
TOIE
TOF
CH0IE
CH0F
CH1IE
CH1F
CH7IE
CH7F
timer overflow
interrupt
channel 0
interrupt
channel 0
output
channel 1
interrupt
channel 1
output
channel 7
interrupt
channel 7
output
NXP Semiconductors