NXP Semiconductors MC9S08SU16 Reference Manual page 64

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IRQ Memory Map and Register Descriptions
Field
7
This field is reserved.
Reserved
This read-only field is reserved and always has the value 0.
6
Interrupt Request (IRQ) Pull Device Disable
IRQPDD
This read/write control bit is used to disable the internal pullup device when the IRQ pin is enabled (IRQPE
= 1) allowing for an external device to be used.
0
IRQ pull device enabled if IRQPE = 1.
1
IRQ pull device disabled if IRQPE = 1.
5
Interrupt Request (IRQ) Edge Select
IRQEDG
This read/write control bit is used to select the polarity of edges or levels on the IRQ pin that cause IRQF
to be set. The IRQMOD control bit determines whether the IRQ pin is sensitive to both edges and levels or
only edges. When the IRQ pin is enabled as the IRQ input and is configured to detect rising edges, the
optional pullup resistor is disabled.
0
IRQ is falling edge or falling edge/low-level sensitive.
1
IRQ is rising edge or rising edge/high-level sensitive.
4
IRQ Pin Enable
IRQPE
This read/write control bit enables the IRQ pin function. When this bit is set the IRQ pin can be used as an
interrupt request.
0
IRQ pin function is disabled.
1
IRQ pin function is enabled.
3
IRQ Flag
IRQF
This read-only status bit indicates when an interrupt request event has occurred.
0
No IRQ request.
1
IRQ event detected.
2
IRQ Acknowledge
IRQACK
This write-only bit is used to acknowledge interrupt request events (write 1 to clear IRQF). Writing 0 has
no meaning or effect. Reads always return 0. If edge-and-level detection is selected (IRQMOD = 1), IRQF
cannot be cleared while the IRQ pin remains at its asserted level.
1
IRQ Interrupt Enable
IRQIE
This read/write control bit determines whether IRQ events generate an interrupt request.
0
Interrupt request when IRQF set is disabled (use polling).
1
Interrupt requested whenever IRQF = 1.
0
IRQ Detection Mode
IRQMOD
This read/write control bit selects either edge-only detection or edge-and-level detection.
0
IRQ event on falling/rising edges only.
1
IRQ event on falling/rising edges and low/high levels.
64
IRQ_SC field descriptions
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
Description
NXP Semiconductors

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