Sp-Relative, 16-Bit Offset (Sp2); Memory To Memory Addressing Mode; Direct To Direct; Immediate To Direct - NXP Semiconductors MC9S08SU16 Reference Manual

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Addressing Modes
Stack pointer relative instructions require a pre-byte for access. Consequently, all SP
relative instructions take one cycle longer than their index relative counterparts.

10.3.6.7 SP-Relative, 16-Bit Offset (SP2)

Stack pointer, 16-bit offset instructions are four-byte instructions used to access data
relative to the stack pointer with variable addresses at any location in memory. The CPU
adds the unsigned contents of the 16-bit stack pointer to the 16-bit unsigned word formed
by the two bytes following the opcode. The sum is the effective address of the operand.
As with direct and extended addressing, most assemblers determine the shortest form of
stack pointer addressing. Due to the pre-byte, stack pointer relative instructions take one
cycle longer than their index relative counterparts.
Stack pointer, 16-bit offset instructions are useful in selecting the k-th element a an n-
element table. The table can begin anywhere and can extend anywhere in memory. The k
value would typically be in the stack pointer register, and the address of the beginning of
the table is located in the two bytes following the two-byte opcode.

10.3.7 Memory to memory Addressing Mode

Memory to memory addressing mode has the following four variations.

10.3.7.1 Direct to Direct

This addressing mode is used to move data within the direct page of memory. Both the
source operand and the destination operand are in the direct page. The source data is
addressed by the first byte immediately following the opcode, and the destination
location is addressed by the second byte following the opcode.

10.3.7.2 Immediate to Direct

This addressing mode is used to move an 8-bit constant to any location in the direct page
memory. The source data is the byte immediately following the opcode, and the
destination is addressed by the second byte following the opcode.
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
136
NXP Semiconductors

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