Pulse Width Timer Negative Pulse Width Register: Low (Pwtx_Npl) - NXP Semiconductors MC9S08SU16 Reference Manual

20.4.6 Pulse Width Timer Negative Pulse Width Register: Low
(PWTx_NPL)
Address: Base address + 5h offset
Bit 7
Read
Write
Reset
0
Field
NPWL Negative Pulse Width[7:0]
Low byte of captured negative pulse width value.
20.4.7 Pulse Width Timer Counter Register: High (PWTx_CNTH)
Address: Base address + 6h offset
Bit 7
Read
Write
Reset 0
Field
PWTH PWT counter[15:8]
High byte of PWT counter register.
20.4.8 Pulse Width Timer Counter Register: Low (PWTx_CNTL)
Address: Base address + 7h offset
Bit 7
Read
Write
Reset 0
NXP Semiconductors
6 5
0 0
PWTx_NPL field descriptions
6 5
0 0
PWTx_CNTH field descriptions
6 5
0 0
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
Chapter 20 Pules Width Timer (PWT)
4 3
NPWL
0 0
Description
4 3
PWTH
0 0
Description
4 3
PWTL
0 0
2 1
0 0
2 1
0 0
2 1
0 0
0
0
0
0
0
0
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