Bus Capture Information And Fifo Operation - NXP Semiconductors MC9S08SU16 Reference Manual

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Chapter 27 Development support

27.3.2 Bus capture information and FIFO operation

The usual way to use the FIFO is to setup the trigger mode and other control options, then
arm the debugger. When the FIFO has filled or the debugger has stopped storing data into
the FIFO, you would read the information out of it in the order it was stored into the
FIFO. Status bits indicate the number of words of valid information that are in the FIFO
as data is stored into it. If a trace run is manually halted by writing 0 to ARM before the
FIFO is full (CNT = 1:0:0:0), the information is shifted by one position and the host must
perform ((8 - CNT) - 1) dummy reads of the FIFO to advance it to the first significant
entry in the FIFO.
In most trigger modes, the information stored in the FIFO consists of 16-bit change-of-
flow addresses. In these cases, read DBGFH then DBGFL to get one coherent word of
information out of the FIFO. Reading DBGFL (the low-order byte of the FIFO data port)
causes the FIFO to shift so the next word of information is available at the FIFO data
port. In the event-only trigger modes (see
Trigger
modes), 8-bit data information is stored
into the FIFO. In these cases, the high-order half of the FIFO (DBGFH) is not used and
data is read out of the FIFO by simply reading DBGFL. Each time DBGFL is read, the
FIFO is shifted so the next data value is available through the FIFO data port at DBGFL.
In trigger modes where the FIFO is storing change-of-flow addresses, there is a delay
between CPU addresses and the input side of the FIFO. Because of this delay, if the
trigger event itself is a change-of-flow address or a change-of-flow address appears
during the next two bus cycles after a trigger event starts the FIFO, it will not be saved
into the FIFO. In the case of an end-trace, if the trigger event is a change-of-flow, it will
be saved as the last change-of-flow entry for that debug run.
The FIFO can also be used to generate a profile of executed instruction addresses when
the debugger is not armed. When ARM = 0, reading DBGFL causes the address of the
most-recently fetched opcode to be saved in the FIFO. To use the profiling feature, a host
debugger would read addresses out of the FIFO by reading DBGFH then DBGFL at
regular periodic intervals. The first eight values would be discarded because they
correspond to the eight DBGFL reads needed to initially fill the FIFO. Additional
periodic reads of DBGFH and DBGFL return delayed information about executed
instructions so the host debugger can develop a profile of executed instruction addresses.
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
NXP Semiconductors
539

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