Pdb1 Counter High/Low (Pdb_Cnt1) - NXP Semiconductors MC9S08SU16 Reference Manual

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Memory Map and Register Descriptions
Field
CMPH1
PDB1 high byte of the comparison value

23.6.8 PDB1 Counter High/Low (PDB_CNT1)

The Counter registers may read the high or low bytes of the counter value which
controlled by [CNTSEL]. When BDM is active, the counter isn't frozen.
Reading either byte would not latch the contents of both bytes
into a buffer.
This register is also used to enable PDB1 by writing 1 to bit 0,
the writing operation doesn't take effect the counter's value.
Address: 60h base + 7h offset = 67h
Bit
7
Read
Write
Reset
0
Field
7–1
PDB1 counter value [7:1]
CNT1_7_1
Control bit [CNTSEL] decides read counter high or low.
0
PDB1 Counter Value 0 and Module Enable
CNT1_0_
This bit read as counter value 0 and is also used to enable the PDB module 1, the writing operation
PDBEN1
doesn't take effect the counter's value. Writing 0 to bit0 of this register: Counter is off and Trigger output is
low.
Writing 1 to bit0 of this register: Counter is enabled.
430
PDB_CMPH1 field descriptions
NOTE
6
5
CNT1_7_1
0
0
PDB_CNT1 field descriptions
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
Description
4
3
0
0
Description
2
1
CNT1_0_
PDBEN1
0
0
NXP Semiconductors
0
0

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