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11.3.3 Flash memory map
The MCU places the flash memory as shown in the following table.
Global address
0x0000_C000–0x0000_FFFF
11.3.4 Flash initialization after system reset
On each system reset, the flash module executes an initialization sequence that
establishes initial values for the flash block configuration parameters, the FPROT
protection register, and the FOPT and FSEC registers. The initialization routine reverts to
built-in default values that leave the module in a fully protected and secured state if errors
are encountered during execution of the reset sequence. If an error is detected during the
reset sequence, both FSTAT[MGSTAT] bits will be set.
FSTAT[CCIF] is cleared throughout the initialization sequence. The NVM module holds
off all CPU access for a portion of the initialization sequence. Flash reads are allowed
after the hold is removed. Completion of the initialization sequence is marked by setting
FSTAT[CCIF] high, which enables user commands. While FSTAT[CCIF] remains
cleared, it is not possible to write on registers FCCOBIX or FCCOB.
If a reset occurs while any flash command is in progress, that command will be
immediately aborted. The state of the word being programmed or the sector/block being
erased is not guaranteed.
11.3.5 Flash command operations
Flash command operations are used to modify flash memory contents.
The command operations contain three steps:
1. Configure the clock for flash program and erase command operations.
2. Use command write sequence to set flash command parameters and launch
execution.
3. Execute valid flash commands according to MCU functional mode and MCU
security state.
NXP Semiconductors
Table 11-1. Flash memory addressing
Flash size
16 KB
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
Chapter 11 Flash Memory Module (FTMRH)
Description
Flash block contains flash configuration field.
157
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