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CMP Block Diagram
EN,PMODE,HYSCTRL
INP
INM
bus clock
FILT_PER
In the CMP block diagram:
• The Window Control block is bypassed when CR1[WE] = 0
• If CR1[WE] = 1, the comparator output will be sampled on every bus clock when
WINDOW=1 to generate COUTA. Sampling does NOT occur when WINDOW = 0.
• The Filter Block is bypassed when not in use.
• The Filter Block acts as a simple sampler if the filter is bypassed and
CR0[FILTER_CNT] is set to 0x01.
• The Filter Block filters based on multiple samples when the filter is bypassed and
CR0[FILTER_CNT] is set greater than 0x01.
• If CR1[SE] = 1, the external SAMPLE input is used as sampling clock
• IF CR1[SE] = 0, the divided bus clock is used as sampling clock
294
FILT_PER
COS
INV
+
Polarity
Select
-
CMPO
WINDOW/SAMPLE
Clock
divided
Prescaler
bus
clock
Figure 18-2. Comparator Module Block Diagram
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
INTERNAL BUS
FILTER_CNT
SE
WE
Window
Filter
Control
Block
1
0
CGMUX
SE
OPE
COUT
IER/F
CFR/F
Interrupt
Control
IRQ
COUT
(TO OTHER SOC FUNCTIONS))
0
COUTA
CMPO to
1
PAD
COS
NXP Semiconductors
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