Fixed Frequency Clock; Fll Lock And Clock Monitor; Fll Clock Lock - NXP Semiconductors MC9S08SU16 Reference Manual

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Until ICSIRCLK is trimmed, programming low bus divider (ICS_C2[BDIV]) factors
may result in ICSOUT frequencies that exceed the maximum chip-level frequency and
violate the chip-level clock timing specifications.
All MCU devices are factory programmed with a trim value in a reserved memory
location. This value is uploaded to the ICS_C3 register and ICS_C4[SCFTRIM] during
any reset initialization. For finer precision, trim the internal oscillator in the application
and set ICS_C4[SCFTRIM] accordingly.

12.4.6 Fixed frequency clock

The ICS presents the divided FLL reference clock as ICSFFCLK for use as an additional
clock source. ICSFFCLK frequency must be no more than 1/4 of the ICSOUT frequency
to be valid. Because of this requirement, in bypass modes, the ICSFFCLK is valid only in
bypass external modes (FBE and FBELP) for the following conditions of
ICS_C2[BDIV], and divider factor of ICS_C1[RDIV] and SIM_SOPT1[RANGE] values:
if SIM_SOPT1[RANGE] is high,
• ICS_C2[BDIV] = 000, ICS_C2[RDIV] ≥ 010
• ICS_C2[BDIV] = 001 (divide by 2), ICS_C2[RDIV] ≥ 011
• ICS_C2[BDIV] = 010 (divide by 4), ICS_C2[RDIV] ≥ 100
• ICS_C2[BDIV] = 011 (divide by 8), ICS_C2[RDIV] ≥ 101

12.4.7 FLL lock and clock monitor

12.4.7.1 FLL clock lock

In FBE and FEE modes, the clock detector source uses the external reference as the
reference. When FLL is detected from lock to unlock, ICS_S[LOLS] is set. An interrupt
will be generated if ICS_C4[LOLIE] is set. ICS_S[LOLS] is cleared by reset or by
writing a logic 1 to ICS_S[LOLS] when ICS_S[LOLS] is set. Writing a logic 0 to
ICS_S[LOLS] has no effect.
In FBI and FEI modes, the lock detector source uses the internal reference as the
reference. When FLL is detected from lock to unlock, ICS_S[LOLS] is set. An interrupt
will be generated if ICS_C4[LOLIE] is set. ICS_S[LOLS] is cleared by reset or by
writing a logic 1 to ICS_S[LOLS] when ICS_S[LOLS] is set. Writing a logic 0 to
ICS_S[LOLS] has no effect.
NXP Semiconductors
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
Chapter 12 Internal Clock Source (ICS)
201

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