Field
7–6
Pin Mux Control
MUXPTA7
The corresponding pin is configured in the following pin muxing slot:
00
Alternative 0.
01
Alternative 1.
10
Alternative 2.
11
Alternative 3.
5–4
Pin Mux Control
MUXPTA6
The corresponding pin is configured in the following pin muxing slot:
00
Alternative 0.
01
Alternative 1.
10
Alternative 2.
11
Alternative 3.
3–2
Pin Mux Control
MUXPTA5
The corresponding pin is configured in the following pin muxing slot:
00
Alternative 0.
01
Alternative 1.
10
Alternative 2.
11
Alternative 3.
MUXPTA4
Pin Mux Control
The corresponding pin is configured in the following pin muxing slot:
00
Alternative 0.
01
Alternative 1.
10
Alternative 2.
11
Alternative 3.
9.8.9 System Port B Pin Multiplexing Control Register: Low
(SIM_MUXPTBL)
Many of the I/O pins are shared with on-chip peripheral functions. This register selects
the multiplexing pin functions from ALT0 to ALT3. Default is ALT0 function, When the
Pin Muxing mode is configured for analog pins, all the digital functions on that pin are
disabled, including the pullup/output/input.
The shared analog pin functions can work together if they're enabled separately because
they're directly connected to internal analog modules separately. They still work even
when pin Muxing mode is configured for digital pins.
NXP Semiconductors
SIM_MUXPTAH field descriptions
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
Chapter 9 System Integration Module (SIM)
Description
113