Pulse Width Timer Positive Pulse Width Register: Loq (Pwtx_Ppl) - NXP Semiconductors MC9S08SU16 Reference Manual

Memory Map and Register Descriptions
Field
PPWH Positive Pulse Width[15:8]
High byte of captured positive pulse width value.
20.4.4 Pulse Width Timer Positive Pulse Width Register: Loq
(PWTx_PPL)
Address: Base address + 3h offset
Bit 7
Read
Write
Reset 0
Field
PPWL Positive Pulse Width[7:0]
Low byte of captured positive pulse width value.
20.4.5 Pulse Width Timer Negative Pulse Width Register: High
(PWTx_NPH)
Address: Base address + 4h offset
Bit 7
Read
Write
Reset 0
Field
NPWH Negative Pulse Width[15:8]
High byte of captured negative pulse width value.
350
PWTx_PPH field descriptions
6 5
0 0
PWTx_PPL field descriptions
6 5
0 0
PWTx_NPH field descriptions
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
Description
4 3
PPWL
0 0
Description
4 3
NPWH
0 0
Description
2 1
0 0
2 1
0 0
NXP Semiconductors
0
0
0
0