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System register file
register, which is written to with the command, global address, data, and any required
command parameters. The memory controller must complete the execution of a
command before the FCCOB register is written to with a new command.
A flash byte or longword must be in the erased state before
being programmed. Cumulative programming of bits within a
flash byte or longword is not allowed.
The flash memory is read as two bytes per read. Read access
time is one bus cycle for two bytes. For flash memory, an
erased bit reads 1 and a programmed bit reads 0.
3.6 System register file
This device includes a 8-byte register file that is powered in all power modes.
Also, it retains contents during low-voltage detect (LVD) events and is only reset during
a power-on reset.
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CAUTION
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
NXP Semiconductors
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