Phase Detection Function Descriptions - NXP Semiconductors MC9S08SU16 Reference Manual

Functional description
The following content describes functional details of the module.
1. The generated 5 V CLAMP is between V
2. Drive 1/8 V to ADC channel AD7.
DD
3. CMP1 and CMP2 are used to generate 22 V over-voltage and 24 V over-voltage
respectively.

25.7.1 Phase detection function descriptions

This section describes the phase detection function.
25.7.1.1 Phase detection diagram
The following figure shows the block diagram for the phase detection.
25.7.1.2 Phase detection descriptions
Phase detection circuit is used to identify a zero-crossing event at a back-EMF (electro-
motive force) signal generated at a winding of permanent magnet motor when the
winding is not energized. A zero-crossing event at a back-EMF signal occurs when the
signal level of the back-EMF signal equals to the voltage at the motor's common neutral
connection. The comparators are provided with a virtual neutral reference signal that is
generated at the virtual resistor network circuit and tracks the signal at the motor
462
PHCMP0
COUT
Window and
To XB_IN12
Filter Control
From XB_OUT10
WINDOW
/SAMPLE
PHCMP1
COUT
Window and
To XB_IN13
Filter Control
From XB_OUT11
WINDOW
/SAMPLE
PHCMP2
COUT
Window and
To XB_IN14
Filter Control
From XB_OUT12
WINDOW
/SAMPLE
From Internal
ACMP 6bit DAC
INTSEL
Phase Detection
Note:
1) Value of external Resistor R must meet the equation: Phase voltage x R
2) Resistance mismatch between R is less than 0.1%
T
3) Resistance mismatch between R is less than 0.1%
x
Figure 25-2. Phase detection diagram
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
and V .
DD O_CLAMP
PHCMP0
R
T
C
(17KΩ)
(Optional)
PHCMP1
R
T
C
(17KΩ)
(Optional)
PHCMP2
R
T
C
(17KΩ)
(Optional)
R R
R
X X
X
(8.5KΩ) (8.5KΩ)
(8.5KΩ)
PHSEL0 PHSEL1 PHSEL2
CMP_REF
VN
EXTSEL
x0.9 / (R+ R x 0.9) <= 5V
T T
R
Vu
Vv
R
R Vw
NXP Semiconductors