Fast Ack And Nack - NXP Semiconductors MC9S08SU16 Reference Manual

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Functional description
Start
SCL
SDA
A master is allowed to abort the transaction in progress to any slave that violates the
T
or T
LOW:SEXT
TIMEOUT,MIN
STOP condition at the conclusion of the byte transfer in progress. When a slave, the I2C
module must not cumulatively extend its clock cycles for a period greater than
T
during any message from the initial START to the STOP. When CSMBCLK
LOW:SEXT
TIMEOUT SEXT occurs, SEXT rises and also triggers SLTF.
CSMBCLK TIMEOUT SEXT and CSMBCLK TIMEOUT
MEXT are optional functions that are implemented in the
second step.

21.5.4.2 FAST ACK and NACK

To improve reliability and communication robustness, implementation of packet error
checking (PEC) by SMBus devices is optional for SMBus devices but required for
devices participating in and only during the address resolution protocol (ARP) process.
The PEC is a CRC-8 error checking byte, calculated on all the message bytes. The PEC is
appended to the message by the device that supplied the last data byte. If the PEC is
present but not correct, a NACK is issued by the receiver. Otherwise an ACK is issued.
To calculate the CRC-8 by software, this module can hold the SCL line low after
receiving the eighth SCL (8th bit) if this byte is a data byte. So software can determine
whether an ACK or NACK should be sent to the bus by setting or clearing the TXAK bit
if the FACK (fast ACK/NACK enable) bit is enabled.
SMBus requires a device always to acknowledge its own address, as a mechanism to
detect the presence of a removable device (such as a battery or docking station) on the
bus. In addition to indicating a slave device busy condition, SMBus uses the NACK
mechanism to indicate the reception of an invalid command or invalid data. Because such
a condition may occur on the last byte of the transfer, SMBus devices are required to
386
ClkAck
T
LOW:MEXT
Figure 21-4. Timeout measurement intervals
specifications. To abort the transaction, the master issues a
NOTE
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
T
LOW:SEXT
ClkAck
T
T
LOW:MEXT
LOW:MEXT
Stop
NXP Semiconductors

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