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Chapter 3
Memory
3.1 Memory map
In this device, the most frequently used registers are placed in the direct page, memory
0x0000 to 0x00FF. Also a portion of RAM is placed in the direct page to take advantage
of the direct addressing mode of the CPU. All other register locations in the extended
page are the same in terms of instruction cycle times.The placement of the other
peripheral modules is not critical because CPU instructions for all other extended
memory have the same timing requirements.
As shown below, on-chip memory in this device consists of RAM and flash program
memory for nonvolatile data storage, plus I/O and control/status registers. The registers
are divided into three groups: direct-page registers, high-page registers and nonvolatile
registers.
The entire memory space are partitioned to:
• Direct-page registers: 0x0000–0x007F
• Random access memory: 0x0080–0x037F
• Unimplemented: 0x0380–0x17FF
• High-page registers: 0x1800–0x18FF
• Unimplemented: 0x1900–0xBFFF (SU16) and 0x1900–0xDFFF (SU8)
• Flash memory (SU16): 0xC000–0xFFFF
• Flash array: 0xC000–0FFBF
• Vector table: 0xFFC0–0xFFFF
• Flash memory (SU8): 0xE000–0xFFFF
• Flash array: 0xE000–0FFBF
• Vector table: 0xFFC0–0xFFFF
NXP Semiconductors
MC9S08SU16 Reference Manual, Rev. 5, 4/2017
43
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