Freescale Semiconductor MPC8313E Family Reference Manual page 32

Paragraph
Number
16.6.12.3.7
16.6.13 Port Test Modes ..................................................................................................... 16-120
16.6.14 Interrupts................................................................................................................ 16-121
16.6.14.1 Transfer/Transaction Based Interrupts............................................................... 16-122
16.6.14.1.1
16.6.14.1.2
16.6.14.1.3
16.6.14.1.4
16.6.14.1.5
16.6.14.2 Host Controller Event Interrupts ....................................................................... 16-124
16.6.14.2.1
16.6.14.2.2
16.6.14.2.3
16.6.14.2.4
16.7 Device Data Structures .............................................................................................. 16-125
16.7.1 Endpoint Queue Head............................................................................................ 16-126
16.7.1.1 Endpoint Capabilities/Characteristics................................................................ 16-127
16.7.1.2 Transfer Overlay ................................................................................................ 16-128
16.7.1.3 Current dTD Pointer .......................................................................................... 16-128
16.7.1.4 Setup Buffer....................................................................................................... 16-128
16.7.2 Endpoint Transfer Descriptor (dTD) ..................................................................... 16-129
16.8 Device Operational Model......................................................................................... 16-131
16.8.1 Device Controller Initialization ............................................................................. 16-131
16.8.2 Port State and Control............................................................................................ 16-133
16.8.2.1 Bus Reset ........................................................................................................... 16-135
16.8.2.2 Suspend/Resume................................................................................................ 16-136
16.8.2.2.1
16.8.2.2.2
16.8.2.2.3
16.8.3 Managing Endpoints .............................................................................................. 16-136
16.8.3.1 Endpoint Initialization ....................................................................................... 16-137
16.8.3.1.1
16.8.3.2 Data Toggle........................................................................................................ 16-138
16.8.3.2.1
16.8.3.2.2
16.8.3.3 Device For Packet Transfers.............................................................................. 16-139
16.8.3.3.1
16.8.3.3.2
16.8.3.4 Interrupt/Bulk Endpoint Operational Model ..................................................... 16-140
16.8.3.4.1
16.8.3.5 Control Endpoint Operation Model ................................................................... 16-142
MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, Rev. 3
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Contents
Split Transaction for Isochronous-Processing Example ............................. 16-119
Transaction Error ........................................................................................... 16-122
Serial Bus Babble .......................................................................................... 16-122
Data Buffer Error ........................................................................................... 16-123
USB Interrupt (Interrupt on Completion (IOC)) ........................................... 16-124
Short Packet ................................................................................................... 16-124
Port Change Events ....................................................................................... 16-124
Frame List Rollover....................................................................................... 16-124
Interrupt on Async Advance.......................................................................... 16-124
Host System Error ......................................................................................... 16-125
Suspend Description ...................................................................................... 16-136
Suspend Operational Model .......................................................................... 16-136
Resume .......................................................................................................... 16-136
Stalling ........................................................................................................... 16-137
Data Toggle Reset.......................................................................................... 16-138
Data Toggle Inhibit ........................................................................................ 16-138
Priming Transmit Endpoints.......................................................................... 16-139
Priming Receive Endpoints ........................................................................... 16-139
Interrupt/Bulk Endpoint Bus Response Matrix ............................................. 16-141
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Freescale Semiconductor