Freescale Semiconductor MPC8313E Family Reference Manual page 21

Paragraph
Number
14.1.4.1 Channel-Controlled Access ................................................................................... 14-7
14.1.4.2 Host-Controlled Access ......................................................................................... 14-8
14.2 Configuration of Internal Memory Space ...................................................................... 14-8
14.3 Descriptor Overview.................................................................................................... 14-10
14.3.1 Descriptor Structure ................................................................................................. 14-11
14.3.2 Descriptor Format: Header Dword .......................................................................... 14-11
14.3.2.1 Selecting Execution Units-EU_SEL0 and EU_SEL1 ....................................... 14-13
14.3.2.2 Selecting Descriptor Type-DESC_TYPE ......................................................... 14-14
14.3.3 Descriptor Format: Pointer Dwords......................................................................... 14-15
14.3.4 Link Table Format ................................................................................................... 14-16
14.3.5 Descriptor Types ...................................................................................................... 14-18
14.4 Execution Units............................................................................................................ 14-19
14.4.1 Data Encryption Standard Execution Unit (DEU)................................................... 14-19
14.4.1.1 DEU Mode Register (DEUMR) .......................................................................... 14-19
14.4.1.2 DEU Key Size Register (DEUKSR).................................................................... 14-20
14.4.1.3 DEU Data Size Register (DEUDSR)................................................................... 14-21
14.4.1.4 DEU Reset Control Register (DEURCR)............................................................ 14-22
14.4.1.5 DEU Status Register (DEUSR) ........................................................................... 14-23
14.4.1.6 DEU Interrupt Status Register (DEUISR) ........................................................... 14-24
14.4.1.7 DEU Interrupt Control Register (DEUICR) ........................................................ 14-25
14.4.1.8 DEU End-of-Message Register (DEUEMR)....................................................... 14-27
14.4.1.9 DEU IV Register (DEUIV) ................................................................................. 14-27
14.4.1.10 DEU Key Registers (DEUKn)............................................................................. 14-28
14.4.1.11 DEU FIFOs .......................................................................................................... 14-28
14.4.2 Message Digest Execution Unit (MDEU) ............................................................... 14-28
14.4.2.1 MDEU Mode Register (MDEUMR) ................................................................... 14-28
14.4.2.2 Recommended Settings for MDEUMR............................................................... 14-31
14.4.2.3 MDEU Key Size Register (MDEUKSR) ............................................................ 14-32
14.4.2.4 MDEU Data Size Register (MDEUDSR)............................................................ 14-32
14.4.2.5 MDEU Reset Control Register (MDEURCR)..................................................... 14-33
14.4.2.6 MDEU Status Register (MDEUSR) .................................................................... 14-34
14.4.2.7 MDEU Interrupt Status Register (MDEUISR).................................................... 14-35
14.4.2.8 MDEU Interrupt Control Register (MDEUICR) ................................................. 14-36
14.4.2.9 MDEU ICV Size Register ................................................................................... 14-37
14.4.2.10 MDEU End-of-Message Register (MDEUEMR)................................................ 14-38
14.4.2.11 MDEU Context Registers .................................................................................... 14-38
14.4.2.12 MDEU Key Registers .......................................................................................... 14-39
14.4.2.13 MDEU FIFOs ...................................................................................................... 14-40
14.4.3 Advanced Encryption Standard Execution Unit (AESU)........................................ 14-40
14.4.3.1 AESU Mode Register (AESUMR)...................................................................... 14-40
14.4.3.2 AESU Key Size Register (AESUKSR) ............................................................... 14-42
MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, Rev. 3
Freescale Semiconductor
Contents
Title
Page
Number
xxi