Freescale Semiconductor MPC8313E Family Reference Manual page 165

Table 3-2. MPC8313E Signal Reference by Signal Name (continued)
Name
TSEC2_RX_ER eTSEC2 receiver
error
TSEC2_RXD[3:0] eTSEC2 receive
data 3–0
TSEC2_TX_CLK eTSEC2 transmit
clock in
TSEC2_TX_EN eTSEC2 transmit
enable
TSEC2_TX_ER eTSEC2 transmit
error
TSEC2_TXD[3:0] eTSEC2 transmit
data 3–0
TXA Serial transmitter,
lane A, positive data
TXA Serial transmitter,
lane A, negative
data (complement)
TXB Serial transmitter,
lane B, positive data
TXB Serial transmitter,
lane B, negative
data (complement)
UART_CTS1 DUART clear to
send
UART_CTS2 DUART clear to
send
UART_RTS1 DUART ready to
send
UART_RTS2 DUART ready to
send
UART_SIN1 DUART serial data
in
UART_SIN2 DUART serial data
in
UART_SOUT1 DUART serial data
out
UART_SOUT2 DUART serial data
out
USB_CLK_IN USB clock input
MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, Rev. 3
Freescale Semiconductor
Functional
Description
Block
eTSEC2
eTSEC2
eTSEC2
eTSEC2
eTSEC2
eTSEC2
SGMII PHY
SGMII PHY
SGMII PHY
SGMII PHY
DUART
DUART
DUART
DUART
DUART
DUART
DUART
DUART
Clocks
No. of Table/
I/O
Signals Page
1 I/O 15-2/15-8
4 I/O 15-2/15-8
1 I/O 15-2/15-8
1 I/O 15-2/15-8
1 I/O 15-2/15-8
4 I/O 15-2/15-8
1 O 15-2/15-8
1 O 15-2/15-8
1 O 15-2/15-8
1 O 15-2/15-8
1 I/O 18-2/18-3
1 I/O 18-2/18-3
1 I/O 18-2/18-3
1 I/O 18-2/18-3
1 I/O 18-2/18-3
1 I/O 18-2/18-3
1 O 18-2/18-3
1 O 18-2/18-3
1 I 4-2/4-3
Signal Descriptions
Alternate Table/
Function(s) Page
GTM1_TOUT2/ 5-28/5-24,
GTM2_TOUT1/ 21-1/21-2
GPIO[24]
GPIO[20:23] 21-1/21-2
GPIO[25] 21-1/21-2
GPIO[26] 21-1/21-2
GPIO[27] 21-1/21-2
CFG_RESET_ 4-1/4-1
SOURCE[0:3]
TXA 15-2/15-8
TXA 15-2/15-8
TXB 15-2/15-8
TXB 15-2/15-8
MSRCID2/GPIO[8] 9-1/9-3,
21-1/21-2
—
MSRCID3/GPIO[9] 9-1/9-3,
21-1/21-2
—
MSRCID1 9-1/9-3
MDVAL
MSRCID0 9-1/9-3
MSRCID4 9-1/9-3
—
—
—
—
—
3-27