Freescale Semiconductor MPC8313E Family Reference Manual page 60

Table
Number
6-1 Arbiter Register Map .............................................................................................................. 6-2
6-2 ACR Field Descriptions .......................................................................................................... 6-3
6-3 ATR Field Descriptions........................................................................................................... 6-4
6-4 AER Field Descriptions .......................................................................................................... 6-5
6-5 AIDR Field Descriptions ........................................................................................................ 6-6
6-6 AMR Field Descriptions ......................................................................................................... 6-7
6-7 AEATR Field Descriptions ..................................................................................................... 6-8
6-8 AEADR Field Descriptions .................................................................................................... 6-9
6-9 AERR Field Descriptions...................................................................................................... 6-10
6-10 Address Only Transaction Type Encoding............................................................................ 6-14
6-11 Reserved Transaction Type Encoding................................................................................... 6-15
6-12 Illegal Transaction Type Encoding ....................................................................................... 6-15
7-1 MSR Bit Descriptions ........................................................................................................... 7-17
7-2 e300 HID0 Bit Descriptions.................................................................................................. 7-20
7-3 Using HID0[ECLK] and HID0[SBCLK] to Configure clk_out ........................................... 7-23
7-4 HID1 Bit Descriptions .......................................................................................................... 7-23
7-5 e300HID2 Bit Descriptions................................................................................................... 7-24
7-6 Interrupt Classifications ...................................................................................................... 7-31
7-7 Exceptions and Interrupts...................................................................................................... 7-31
7-8 Differences Between e300 and G2_LE Cores ...................................................................... 7-38
8-1 IPIC Signal Properties............................................................................................................. 8-5
8-2 IPIC External Signals—Detailed Signal Descriptions............................................................ 8-6
8-3 IPIC Register Address Map .................................................................................................... 8-7
8-4 SICFR Field Descriptions ....................................................................................................... 8-8
8-5 SIVCR Field Descriptions ...................................................................................................... 8-9
8-6 IVEC/CVEC/MVEC Field Definition ................................................................................. 8-10
8-7 SIPNR_H/SIFCR_H/SIMSR_H Bit Assignments................................................................ 8-12
8-8 SIPNR_H Field Descriptions ................................................................................................ 8-12
8-9 SIPNR_L/SIFCR_L/SIMSR_L Bit Assignments ................................................................. 8-13
8-10 SIPNR_L Field Descriptions ................................................................................................ 8-14
8-11 SIPRR_A Field Descriptions ................................................................................................ 8-14
8-12 SIPRR_D Field Descriptions ................................................................................................ 8-15
8-13 SIMSR_H Field Descriptions ............................................................................................... 8-16
8-14 SIMSR_L Field Descriptions................................................................................................ 8-17
8-15 SICNR Field Descriptions .................................................................................................... 8-17
8-16 SEPNR Field Descriptions.................................................................................................... 8-19
8-17 SMPRR_A Field Descriptions .............................................................................................. 8-19
8-18 SMPRR_B Field Descriptions .............................................................................................. 8-20
8-19 SEMSR Field Descriptions ................................................................................................... 8-21
8-20 SECNR Field Descriptions ................................................................................................... 8-22
8-21 SERSR/SERMR/SERFR Bit Assignments ........................................................................... 8-23
MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, Rev. 3
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Freescale Semiconductor