Freescale Semiconductor MPC8313E Family Reference Manual page 55

Figure
Number
20-1 JTAG Interface Block Diagram ............................................................................................ 20-1
21-1 GPIO Module Block Diagram .............................................................................................. 21-1
21-2 GPIO Direction Register (GPDIR) ....................................................................................... 21-3
21-3 GPIO Open Drain Register (GPODR) .................................................................................. 21-3
21-4 GPIO Data Register (GPDAT) .............................................................................................. 21-4
21-5 GPIO Interrupt Event Register (GPIER) .............................................................................. 21-4
21-6 GPIO Interrupt Mask Register (GPIMR).............................................................................. 21-5
21-7 GPIO Interrupt Control Register (GPICR) ........................................................................... 21-5
MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, Rev. 3
Freescale Semiconductor
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