Lblawar0-Lblawar3 Bit Settings; Lblawar0[En] Reset Value - Freescale Semiconductor MPC8313E Family Reference Manual

Powerquicc ii pro integrated processor
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5.2.4.4
LBC Local Access Window n Attributes Registers
(LBLAWAR0–LBLAWAR3)
The LBC local access window n attributes registers (LBLAWAR0–LBLAWAR3) are shown in
Offset 0x24, 0x2C, 0x34, 0x3C
0
1
R
EN
W
1
Reset 0
0
0
0
0
1 The LBLAWAR0[EN] reset value depends on the reset configuration word high values. See
and LBLAWAR0[SIZE] Reset Value,"
2 The LBLAWAR0[SIZE] reset value is always 0b010110, meaning an 8-Mbyte local access window. See
"LBLAWAR0[EN] and LBLAWAR0[SIZE] Reset Value,"
Figure 5-5. LBC Local Access Window n Attributes Registers (LBLAWAR0–LBLAWAR3)
Table 5-9
defines the bit fields of LBLAWAR0–LBLAWAR3.
'
Bits
Name
0
EN
0 Local bus local access window n is disabled.
1 Local bus local access window n is enabled and other LBLAWAR0 and LBLAWBAR0 fields combine to
identify an address range for this window.
1–25
Reserved. Write has no effect, read returns 0.
26–31
SIZE
Identifies the size of the window from the starting address. Window size is 2
000000–001010 Reserved. Window is undefined.
001011 4 Kbytes
001100 8 Kbytes
001101 16 Kbytes
. . . . . . . 2
011110 2 Gbytes
011111–111111 Reserved. Window is undefined.
5.2.4.4.1
LBLAWAR0[EN] and LBLAWAR0[SIZE] Reset Value
The core may use a local bus peripheral device to fetch its boot vector. For this purpose an 8-Mbyte
(22+1)
(2
) local access window is defined by the LBLAWBAR0[SIZE] reset value, and LBLAWAR0 is
enabled according to the value set in the reset configuration word high ROMLOC field.
Table 5-10
defines the reset value for LBLAWAR0[EN].
'
RCWHR[RLEXT]/
RCWHR[ROMLOC]
00 / 000–100
00 / 101–111
MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, Rev. 3
Freescale Semiconductor
0
0
0
0
0
0
0
for a detailed description.
Table 5-9. LBLAWAR0–LBLAWAR3 Bit Settings
(SIZE+1)
bytes
Table 5-10. LBLAWAR0[EN] Reset Value
LBLAWAR0[EN]
Reset Value
0
e300c3 core boot not performed from a local bus device.
1
e300c3 core boot performed from a local bus device. Local bus 8-Mbyte
(22+1)
(2
——
0
0
0
0
0
0
0
0
for a detailed description.
Description
Description
) local access window is enabled.
System Configuration
Access: Read/Write
25 26
0
0
0
0
0
0
0
0
Section 5.2.4.4.1, "LBLAWAR0[EN]
Section 5.2.4.4.1,
(SIZE+1)
bytes.
Figure
5-5.
31
SIZE
2
0
0
0 0
5-9

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