External Signals-Detailed Signal Descriptions - Freescale Semiconductor MPC8313E Family Reference Manual

Signal Descriptions
3.4 External Signal Description
Table 3-6 provides a detailed description of the external CFG_LBIU_MUX_EN (LA[0:15]) signals.
Signal
CFG_LBIU_MUX_EN
(LA[0:15]/GPIO)
MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, Rev. 3
3-32
Table 3-6. External Signals—Detailed Signal Descriptions
I/O
I State Asserted—GPIO ports function according to the values in their configuration
Meaning registers (this may be eLBC or non-eLBC functionality).
Negated—GPIO ports function as LA[0:15] irrespective of the value in their
configuration registers.
Timing This signal should be connected to pull-up or pull-down on the board. The signal
needs to be valid at all times and static.
Description
Freescale Semiconductor