Table
Number
4-30
RPR Field Descriptions......................................................................................................... 4-36
4-31
RCR Field Descriptions ........................................................................................................ 4-36
4-32
RCER Field Descriptions...................................................................................................... 4-37
4-33
4-34
SPMR Field Descriptions...................................................................................................... 4-38
4-35
OCCR Field Descriptions ..................................................................................................... 4-39
4-36
SCCR Field Descriptions ...................................................................................................... 4-40
5-1
5-2
5-3
5-4
5-5
IMMRBAR Bit Settings.......................................................................................................... 5-7
5-6
ALTCBAR Bit Settings........................................................................................................... 5-7
5-7
5-8
5-9
5-10
LBLAWAR0[EN] Reset Value................................................................................................ 5-9
5-11
5-12
5-13
5-14
5-15
5-16
5-17
5-18
5-19
5-20
5-21
SGPRL Bit Settings .............................................................................................................. 5-17
5-22
SGPRH Bit Settings .............................................................................................................. 5-17
5-23
SPRIDR Bit Settings ............................................................................................................. 5-18
5-24
PARTID Coding .................................................................................................................... 5-18
5-25
REVID Coding...................................................................................................................... 5-18
5-26
SPCR Bit Settings ................................................................................................................. 5-19
5-27
SICRL Bit Settings................................................................................................................ 5-21
5-28
SICRH Bit Settings ............................................................................................................... 5-24
5-29
SICRH[30-31] Bit Settings .................................................................................................. 5-26
5-30
DDRCDR Field Descriptions................................................................................................ 5-27
5-31
DDRDSR Field Descriptions ................................................................................................ 5-28
5-32
WDT Register Address Map................................................................................................. 5-30
5-33
SWCRR Bit Settings ............................................................................................................. 5-31
5-34
SWCNR Bit Settings............................................................................................................. 5-32
MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, Rev. 3
lviii
Tables
Title
Page
Number
Freescale Semiconductor