Freescale Semiconductor MPC8313E Family Reference Manual page 51

Figure
Number
15-103 ATTR Register Definition ................................................................................................. 15-108
15-104 RQPRM Register Definition............................................................................................. 15-109
15-105 RFBPTR0–RFBPTR7 Register Definition........................................................................ 15-110
15-106 TMR_CTRL Register Definition .......................................................................................15-111
15-107 TMR_TEVENT Register Definition................................................................................. 15-113
15-108 TMR_TEMASK Register Definition................................................................................ 15-114
15-109 TMR_PEVENT Register Definition................................................................................. 15-115
15-110 TMR_PEMASK Register Definition ................................................................................ 15-116
15-111 TMR_CNT_H Register Definition ................................................................................... 15-117
15-112 TMR_ADD Register Definition........................................................................................ 15-118
15-113 TMR_ACC Register Definition ........................................................................................ 15-119
15-114 TMR_PRSC Register Definition ...................................................................................... 15-119
15-115 TMROFF_H/L Register Definition .................................................................................. 15-120
15-116 TMR_ALARM1-2_H/L Register Definition .................................................................... 15-120
15-117 TMR_FIPERn Register Definition ................................................................................... 15-121
15-118 TMR_ETTS1-2_H/L Register Definition ......................................................................... 15-122
15-119 Control Register Definition............................................................................................... 15-125
15-120 Status Register Definition ................................................................................................. 15-126
15-121 AN Advertisement Register Definition............................................................................. 15-127
15-122 AN Link Partner Base Page Ability Register Definition .................................................. 15-129
15-123 AN Expansion Register Definition ................................................................................... 15-130
15-124 AN Next Page Transmit Register Definition .................................................................... 15-130
15-125 AN Link Partner Ability Next Page Register Definition .................................................. 15-131
15-126 Extended Status Register Definition ................................................................................. 15-132
15-127 Jitter Diagnostics Register Definition ............................................................................... 15-133
15-128 TBI Control Register Definition ....................................................................................... 15-134
15-129 eTSEC-MII Connection .................................................................................................... 15-136
15-130 eTSEC-RMII Connection ................................................................................................. 15-137
15-131 eTSEC-RGMII Connection............................................................................................... 15-138
15-132 eTSEC-RTBI Connection ................................................................................................. 15-139
15-133 eTSEC-SGMII Connection ............................................................................................... 15-140
15-134 Definition of Custom Preamble Sequence ........................................................................ 15-148
15-135 Definition of Received Preamble Sequence...................................................................... 15-149
15-136 Ethernet Address Recognition Flowchart ......................................................................... 15-151
15-137 Sample C Code for Computing eTSEC Hash Table Indices............................................. 15-153
15-138 Location of Frame Control Blocks for TOE Parameters .................................................. 15-161
15-139 Transmit Frame Control Block ......................................................................................... 15-162
15-140 Receive Frame Control Block........................................................................................... 15-163
15-141 Structure of the Receive Queue Filer Table ...................................................................... 15-168
15-142 1588 Timer Design Partition ............................................................................................. 15-181
15-143 Ethernet Sampling Points for 1588 ................................................................................... 15-181
MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, Rev. 3
Freescale Semiconductor
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