Freescale Semiconductor MPC8313E Family Reference Manual page 122

Memory Map
Offset
0x0_8210 DMASAR2—DMA 2 source address register
0x0_8218 DMADAR2—DMA 2 destination address register
0x0_8220 DMABCR2—DMA 2 byte count register
0x0_8224 DMANDAR2—DMA 2 next descriptor address register
0x0_8280 DMAMR3—DMA 3 mode register
0x0_8284 DMASR3—DMA 3 status register
0x0_8288 DMACDAR3—DMA 3 current descriptor address register
0x0_8290 DMASAR3—DMA 3 source address register
0x0_8298 DMADAR3—DMA 3 destination address register
0x0_82A0 DMABCR3—DMA 3 byte count register
0x0_82A4 DMANDAR3—DMA 3 next descriptor address register
0x0_82A8 DMAGSR—DMA general status register
0x0_82B0– Reserved, should be cleared
0x0_82FF
0x0_8300 PCI CONFIG_ADDRESS
0x0_8304 PCI CONFIG_DATA
0x0_8308 PCI INT_ACK
0x0_830C– Reserved, should be cleared
0x0_837F
0x0_8380 PCIPMR0—PCI power management register 0
0x0_8384 PCIPMR1—PCI power management register 1
0x0_8388– Reserved
0x0_83FF
0x0_8400 POTAR0—PCI outbound translation address register
0x0_8408 POBAR0—PCI outbound base address register 0
0x0_8410 POCMR0—PCI outbound comparison mask register 0
0x0_8418 POTAR1—PCI outbound translation address register 1
0x0_8420 POBAR1—PCI outbound base address register 1
0x0_8428 POCMR1—PCI outbound comparison mask register 1
0x0_8430 POTAR2—PCI outbound translation address register 2
0x0_8438 POBAR2—PCI outbound base address register 2
0x0_8440 POCMR2—PCI outbound comparison mask register 2
0x0_8448 POTAR3—PCI outbound translation address register 3
0x0_8450 POBAR3—PCI outbound base address register 3
MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual, Rev. 3
2-16
Table 2-2. Memory Map (continued)
Register
PCI Software Configuration Registers
Sequencer (IOS)
Access Reset
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R 0x0000_0000
— —
W —
R/W —
R —
— —
R 0x7E4B_0001
R/W 0x00 n 0_0000
— —
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
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